(页数:25字数:9590)摘要:简要介绍N分频合成器ADF4154芯片的功能、内部结构、引脚排列以及典型的电路设计,ADF4154是一在无线接受器和发射器的上边频和下边频上实现本机震荡器的N分频频率合成器。它由一个低噪音数字锁相频率检波器(PFD),一个精确的充电泵,一个可编程的基准分频器。它有一个基于允许可编程的N分频校对机部分的Σ-Δ。INT FRAC和MOD寄存器定义B分配公式:N = (INT + (FRAC/MOD)). 另外,四位的参考计数器(R计数器)允许在PFD输入端选择REFIN的频率输入。一个外部环路滤波器和压控震荡器VCO可以实现一个完整的锁相环路PLL。 ADF4154一个重要的特征是一个内在的快锁模式定时器,用户可以编写一个预定的定时值代替外在时间,从而使PLL工作在宽带宽模式下。 使用一个简单的三线串行借口控制寄存节点。2.7—3.3V电源提供装置的运转,且在不使用情况下低功耗运行。 关键字: 独立VP 双模前置分频 充电泵 三线串行接口 数字锁定检测 定时快锁模式
Abstract It briefly introduced The Fractional-N Frequency Synthesizer ADF4154 microcontroller function, internal structure, pin array and typical apply circuit. The ADF4154 is a fractional-N frequency synthesizer that implements local oscillators in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow program-mable fractional-N division. The INT, FRAC, and MOD regis-ters define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO). A key feature of the ADF4154 is the fast-lock mode with a built-in timer. The user can program a predetermined count-down time value so that the PLL will remain in wide bandwidth mode, instead of having to control this time externally. Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V, and can be powered down when not in use. KEY WORD: Separate VP dual-modulus prescaler charge pump 3-wire serial interface Digital lock detect fractional-N synthesizer Fast-lock mode with built-in timer
1、ADF4154芯片简介-----------------------------------------------------2 2、ADF4154芯片封装与引脚功能--------------------------------------------4 3、ADF4154特性----------------------------------------------------------5 3、1 ADF4154电气特性------------------------------------------------5 3、2 ADF4154时间特性------------------------------------------------7 3、3 ADF4154最大额定值----------------------------------------------8 3、4 ADF4154典型性能特性--------------------------------------------8 4、DF4154内部结构与工作原理--------------------------------------------10 4、1 基准输入极-----------------------------------------------------10 4、2 RF输入极-------------------------------------------------------11 4、3 RF R 计数器----------------------------------------------------11 4、4相位频率检波器和充电泵------------------------------------------12 4、5 MUXOUT(多路复用输出)和LOCK DETECT----------------------------13 4、6寄存器----------------------------------------------------------14 4、6、1 N分频寄存器 R0----------------------------------------16 4、6、2 R分配寄存器 R1----------------------------------------16 4、6、3 4位射频R 寄存器---------------------------------------17 4、6、4 控制寄存器 R2---------------------------------------17 4、6、5 噪音和迹寄存器 R3--------------------------------------18 5、DF4154电路设计--------------------------------------------------------20 5、1 循环滤波器布局-------------------------------------------------20 5、2 滤波器设计构思-------------------------------------------------21 5、3 接口连接-------------------------------------------------------21 5、4 ADSP-2181接口--------------------------------------------------22 5、5 PCB 芯片比例设计方针-------------------------------------------22 5、6 外形轮廓-------------------------------------------------------23 6、总结-------------------------------------------------------------------23 7、参考资料---------------------------------------------------------------24
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