| TL/F/6562 54191/DM54191/DM74191 Synchronous Up/Down 4-Bit Binary Counter with Mode Control June 1989 54191/DM54191/DM74191 Synchronous Up/Down 4-Bit Binary Counter with Mode Control General Description This circuit is a synchronous, reversible, up/down counter. The 191 is a 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchro- nous (ripple clock) counters. The outputs of the four master-slave flip-flops are triggered on a low-to-high level transition of the clock input, if the enable input is low. A high at the enable input inhibits count- ing. Level changes at either the enable input or the down/ up input should be made only when the clock input is high. The direction of the count is determined by the level of the down/up input. When low, the counter counts up and when high, it counts down. This counter is fully programmable; that is, the outputs may be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output will change independent of the level of the clock input. This feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. The clock, down/up, and load inputs are buffered to lower the drive requirement; which significantly [原文截取] TL/F/6562 54191/DM54191/DM74191 Synchronous Up/Down 4-Bit Binary Counter with Mode Control June 1989 54191/DM54191/DM74191 Synchronous Up/Down 4-Bit Binary Counter with Mode Control General Description This circuit is a synchronous, reversible, up/down counter. The 191 is a 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change simultaneously when so instructed by the steering logic. This mode of operation eliminates the..... |
74191TTL二进制同步可逆计数器
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